Resistor equipped double transistor Nexperia PUMD10 115 in compact SOT363 package for circuit design
Product Overview
The Nexperia PUMD10 is a resistor-equipped double transistor (RET) featuring both NPN and PNP configurations within a compact SOT363 (SC-88) SMD plastic package. This device simplifies circuit design and reduces component count with its built-in bias resistors, enabling a 100 mA output current capability. It is ideal for low-current peripheral driving, controlling IC inputs, and replacing general-purpose transistors in digital applications.
Product Attributes
- Brand: Nexperia
- Package Type: TSSOP6 (SOT363)
- Qualification: Non-automotive
Technical Specifications
| Parameter | Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|
| General | |||||
| Collector-emitter voltage (VCEO) | Open base (per transistor) | - | - | 50 | V |
| Output current (IO) | Per transistor | - | - | 100 | mA |
| Bias resistor R1 (input) | [1] | 1.54 | 2.2 | 2.86 | k |
| Bias resistor ratio R2/R1 | [1] | 17 | 21 | 26 | - |
| Limiting values | |||||
| Collector-base voltage (VCBO) | Open emitter (per transistor) | - | - | 50 | V |
| Collector-emitter voltage (VCEO) | Open base (per transistor) | - | - | 50 | V |
| Emitter-base voltage (VEBO) | Open collector (per transistor) | - | - | 5 | V |
| Input voltage (VI) | Positive (TR1) | - | - | 12 | V |
| Input voltage (VI) | Negative (TR1) | - | - | -5 | V |
| Input voltage (VI) | Positive (TR2) | - | - | 5 | V |
| Input voltage (VI) | Negative (TR2) | - | - | -12 | V |
| Total power dissipation (Ptot) | Tamb 25 C (per device) [1] | - | - | 300 | mW |
| Junction temperature (Tj) | - | - | - | 150 | C |
| Storage temperature (Tstg) | - | -65 | - | 150 | C |
| Characteristics | |||||
| Collector-base breakdown voltage (V(BR)CBO) | IC = 100 A; IE = 0 A (per transistor) | 50 | - | - | V |
| Collector-emitter breakdown voltage (V(BR)CEO) | IC = 2 mA; IB = 0 A (per transistor) | 50 | - | - | V |
| Collector-base cut-off current (ICBO) | VCB = 50 V; IE = 0 A (per transistor) | - | - | 100 | nA |
| Collector-emitter cut-off current (ICEO) | VCE = 30 V; IB = 0 A (per transistor) | - | - | 100 | nA |
| Collector-emitter cut-off current (ICEO) | VCE = 30 V; IB = 0 A; Tj = 150 C (per transistor) | - | - | 5 | A |
| Emitter-base cut-off current (IEBO) | VEB = 5 V; IC = 0 A (per transistor) | - | - | 180 | A |
| DC current gain (hFE) | VCE = 5 V; IC = 10 mA (per transistor) | 100 | - | - | - |
| Collector-emitter saturation voltage (VCEsat) | IC = 5 mA; IB = 0.25 mA (per transistor) | - | - | 100 | mV |
| Off-state input voltage (VI(off)) | VCE = 5 V; IC = 100 A (per transistor) | - | 0.6 | 0.5 | V |
| On-state input voltage (VI(on)) | VCE = 0.3 V; IC = 5 mA (per transistor) | 1.1 | 0.75 | - | V |
| Collector capacitance (Cc) | VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz (TR1) | - | - | 2.5 | pF |
| Transition frequency (fT) | VCE = 5 V; IC = 10 mA; f = 100 MHz (TR1) [2] | - | 230 | - | MHz |
| Collector capacitance (Cc) | VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz (TR2) | - | - | 3 | pF |
| Transition frequency (fT) | VCE = 5 V; IC = 10 mA; f = 100 MHz (TR2) [2] | - | 180 | - | MHz |
| Package Dimensions | |||||
| Body dimensions | - | 2.1 | - | 1.25 | mm |
| Body height | - | - | - | 0.95 | mm |
| Pitch | - | - | - | 0.65 | mm |
[1] See section "Test information" for resistor calculation and test conditions.
[2] Characteristics of built-in transistor.
2410121943_Nexperia-PUMD10-115_C454998.pdf
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