Nexperia PUMD9 115 dual transistor with integrated bias resistors providing load switching capabilities

Key Attributes
Model Number: PUMD9,115
Product Custom Attributes
Emitter-Base Voltage VEBO:
6V
Input Resistor:
10kΩ
Resistor Ratio:
4.7
Collector - Emitter Voltage VCEO:
50V
Mfr. Part #:
PUMD9,115
Package:
TSSOP-6(SOT-363)
Product Description

Product Overview

The Nexperia PUMD9 is a resistor-equipped double transistor (RET) featuring both NPN and PNP configurations within a single, very small SOT363 (SC-88) SMD plastic package. This device integrates built-in bias resistors, simplifying circuit design, reducing component count, and lowering pick-and-place costs. It is designed for digital applications in automotive and industrial segments, serving as a cost-saving alternative for BC847/BC857 series in digital applications, and is suitable for controlling IC inputs and switching loads. The PUMD9 offers a 100 mA output current capability and a collector-emitter voltage of 50 V.

Product Attributes

  • Brand: Nexperia
  • Package Type: TSSOP6 (SOT363)
  • Transistor Type: NPN/PNP Resistor-Equipped Double Transistor (RET)
  • Resistor Values: R1 = 10 k, R2 = 47 k

Technical Specifications

Symbol Parameter Conditions Min Typ Max Unit
Per transistor, for the PNP transistor with negative polarity
VCEO Collector-emitter voltage Open base - - 50 V
IO Output current - - - 100 mA
R1 Bias resistor 1 (input) [1] 7 10 13 k
R2/R1 Bias resistor ratio [1] 3.7 4.7 5.7 -
VCBO Collector-base voltage Open emitter - - 50 V
VEBO Emitter-base voltage Open collector - - 6 V
VI Input voltage TR1 - - - -6 V
VI Input voltage TR2 - - - -40 V
IO Output current - - - 100 mA
Ptot Total power dissipation Tamb 25 C [1] - - 200 mW
Ptot Total power dissipation (per device) Tamb 25 C [1] - - 300 mW
Tj Junction temperature - - - 150 C
Tamb Ambient temperature - -65 - 150 C
Tstg Storage temperature - -65 - 150 C
Thermal characteristics
Rth(j-a) Thermal resistance from junction to ambient in free air [1] - - 625 K/W
Rth(j-a) Thermal resistance from junction to ambient in free air (per device) [1] - - 417 K/W
Characteristics
V(BR)CBO Collector-base breakdown voltage IC = 100 A; IE = 0 A; Tamb = 25 C 50 - - V
V(BR)CEO Collector-emitter breakdown voltage IC = 2 mA; IB = 0 A; Tamb = 25 C 50 - - V
ICBO Collector-base cut-off current VCB = 50 V; IE = 0 A; Tamb = 25 C - - 100 nA
ICEO Collector-emitter cut-off current VCE = 30 V; IB = 0 A; Tamb = 25 C - - 100 nA
ICEO Collector-emitter cut-off current VCE = 30 V; IB = 0 A; Tj = 150 C - - 5 A
IEBO Emitter-base cut-off current VEB = 5 V; IC = 0 mA; Tamb = 25 C - - 150 A
hFE DC current gain VCE = 5 V; IC = 5 mA; Tamb = 25 C 100 - - -
VCEsat Collector-emitter saturation voltage IC = 5 mA; IB = 0.25 mA; Tamb = 25 C - - 100 mV
VI(off) Off-state input voltage VCE = 5 V; IC = 100 A; Tamb = 25 C - 0.7 0.5 V
VI(on) On-state input voltage VCE = 0.3 V; IC = 1 mA; Tamb = 25 C 1.4 0.8 - V
R1 Bias resistor 1 (input) [1] 7 10 13 k
R2/R1 Bias resistor ratio [1] 3.7 4.7 5.7 -
TR1 (NPN)
Cc Collector capacitance VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 C - - 2.5 pF
fT Transition frequency VCE = 5 V; IC = 10 mA; f = 100 MHz; Tamb = 25 C [2] - 230 - MHz
TR2 (PNP)
Cc Collector capacitance VCB = -10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 C - - 3 pF
fT Transition frequency VCE = -5 V; IC = -10 mA; f = 100 MHz; Tamb = 25 C [2] - 180 - MHz
Test information
R1 Bias resistor 1 (input) [1] 10 - - k
R2 Bias resistor 2 [1] 47 - - k
II1 Test current - 90 - - A
II2 Test current - 140 - - A
II3 Test current - -55 - - A
II4 Test current - -105 - - A
Package outline
Package Name Description Dimensions Unit - - -
TSSOP6 (SOT363) Plastic, surface-mounted package; 6 leads; 0.65 mm pitch; 2.1 mm x 1.25 mm x 0.95 mm body 2.1 x 1.25 x 0.95 mm - - -

[1] See "Section 11: Test information" for resistor calculation and test conditions.

[2] Characteristics of built-in transistor.


2410121940_Nexperia-PUMD9-115_C135829.pdf

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