AEC Q101 qualified P channel MOSFET RENESAS NP100P04PDG E1 AY with high current switching capability
Product Overview
The NP100P04PDG is a P-channel MOS Field Effect Transistor designed for high current switching applications. It offers super low on-state resistance and low input capacitance, making it suitable for automotive applications and is AEC-Q101 qualified. This product is Pb-free.
Product Attributes
- Brand: Renesas Electronics
- Certifications: AEC-Q101 qualified
- Material: Pb-free (external electrode)
Technical Specifications
| Item | Symbol | Min | Typ | Max | Unit | Test Conditions |
|---|---|---|---|---|---|---|
| Drain to Source Voltage (VGS = 0 V) | VDSS | -40 | V | |||
| Gate to Source Voltage (VDS = 0 V) | VGSS | ±20 | V | |||
| Drain Current (DC) (Tc = 25 °C) | ID(DC) | ±100 | A | |||
| Drain Current (pulse) | ID(pulse) | ±300 | A | Notes1 | ||
| Total Power Dissipation (Tc = 25 °C) | PT1 | 200 | W | |||
| Total Power Dissipation (Ta = 25 °C) | PT2 | 1.8 | W | |||
| Channel Temperature | Tch | 175 | °C | |||
| Storage Temperature | Tstg | -55 | 175 | °C | ||
| Single Avalanche Current | IAS | 74 | A | Notes2 | ||
| Single Avalanche Energy | EAS | 550 | mJ | Notes2 | ||
| Channel to Case Thermal Resistance | Rth(ch-c) | 0.75 | °C/W | Notes3 | ||
| Channel to Ambient Thermal Resistance | Rth(ch-a) | 83.3 | °C/W | Notes3 | ||
| Zero Gate Voltage Drain Current | IDSS | -10 | μA | VDS = -40 V, VGS = 0 V | ||
| Gate Leakage Current | IGSS | ±100 | nA | VGS = ±20 V, VDS = 0 V | ||
| Gate to Source Threshold Voltage | VGS(th) | -1.0 | -1.6 | -2.5 | V | VDS = -10 V, ID = -1 mA |
| Forward Transfer Admittance | | yfs | | 43 | 88 | S | VDS = -10 V, ID = -50 A (Notes4) | |
| Drain to Source On-state Resistance | RDS(on)1 | 2.8 | 3.5 | mΩ | VGS = -10 V, ID = -50 A (Notes4) | |
| Drain to Source On-state Resistance | RDS(on)2 | 3.4 | 5.1 | mΩ | VGS = -4.5 V, ID = -50 A (Notes4) | |
| Input Capacitance | Ciss | 15100 | pF | VDS = -10 V, VGS = 0 V, f = 1 MHz | ||
| Output Capacitance | Coss | 2400 | pF | VDS = -10 V, VGS = 0 V, f = 1 MHz | ||
| Reverse Transfer Capacitance | Crss | 1130 | pF | VDS = -10 V, VGS = 0 V, f = 1 MHz | ||
| Turn-on Delay Time | td(on) | 38 | ns | VDD = -20 V, ID = -45 A, VGS = -10 V, RG = 0 Ω | ||
| Rise Time | tr | 30 | ns | VDD = -20 V, ID = -45 A, VGS = -10 V, RG = 0 Ω | ||
| Turn-off Delay Time | td(off) | 300 | ns | VDD = -20 V, ID = -45 A, VGS = -10 V, RG = 0 Ω | ||
| Fall Time | tf | 100 | ns | VDD = -20 V, ID = -45 A, VGS = -10 V, RG = 0 Ω | ||
| Total Gate Charge | Qg | 320 | nC | VDD = -32 V, VGS = -10 V, ID = -100A | ||
| Gate to Source Charge | Qgs | 37 | nC | VDD = -32 V, VGS = -10 V, ID = -100A | ||
| Gate to Drain Charge | Qgd | 85 | nC | VDD = -32 V, VGS = -10 V, ID = -100A | ||
| Body Diode Forward Voltage | VF(S-D) | 0.91 | 1.5 | V | IF = -100 A, VGS = 0 V (Notes4) | |
| Reverse Recovery Time | trr | 70 | ns | IF = -100 A, VGS = 0 V, di/dt = -100 A/μs | ||
| Reverse Recovery Charge | Qrr | 123 | nC | IF = -100 A, VGS = 0 V, di/dt = -100 A/μs |
Notes: 1. PW ≤ 10 μs, Duty Cycle ≤ 1%
2. Starting Tch=25°C, VDD = -20V, RG = 25 Ω, VGS = -20 → 0V, L = 100μH
3. Designed target value on Renesas measurement condition. Not subject to production test.
4. Pulse test.
2404031109_RENESAS-NP100P04PDG-E1-AY_C3281533.pdf
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