Switching P Channel MOSFET Leiditech LMTL5P02 with Low Gate Charge and High Continuous Drain Current
Product Overview
The LMTL5P02 is a P-Channel Enhancement Mode MOSFET designed with advanced trench technology. It offers excellent RDS(ON) and low gate charge, enabling operation with gate voltages as low as 4.5V. This device is ideal for battery protection and other switching applications, including load switches and uninterruptible power supplies.
Product Attributes
- Brand: Leiditech
- Model: LMTL5P02
- Package: SOT-23
- Origin: Shanghai Leiditech Electronic Co.,Ltd
Technical Specifications
| Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit |
|---|---|---|---|---|---|---|
| General Features | ||||||
| VDS | Drain-Source Voltage | -20 | V | |||
| ID | Continuous Drain Current | VGS @ -4.5V | -4.9 | A | ||
| RDS(ON) | Static Drain-Source On-Resistance | VGS=-4.5V, ID=-4.9A | 32 | 38 | m | |
| VGS(th) | Gate Threshold Voltage | VGS=VDS, ID =-250uA | -0.4 | -1.0 | V | |
| Qg | Total Gate Charge | VDS=-15V, VGS=-4.5V, ID=-3A | 10.2 | 14.3 | nC | |
| Absolute Maximum Ratings | ||||||
| VDS | Drain-Source Voltage | (TC=25 unless otherwise noted) | -20 | V | ||
| VGS | Gate-Source Voltage | 12 | V | |||
| ID@TA=25 | Continuous Drain Current, VGS @ -4.5V1 | -4.9 | A | |||
| ID@TA=70 | Continuous Drain Current, VGS @ -4.5V1 | -3.9 | A | |||
| IDM | Pulsed Drain Current2 | -14 | A | |||
| PD@TA=25 | Total Power Dissipation3 | 1.31 | W | |||
| PD@TA=70 | Total Power Dissipation3 | 0.84 | W | |||
| TSTG | Storage Temperature Range | -55 | 150 | |||
| TJ | Operating Junction Temperature Range | -55 | 150 | |||
| RJA | Thermal Resistance Junction-Ambient1 | 120 | /W | |||
| RJA | Thermal Resistance Junction-Ambient1 (t 10s) | 95 | /W | |||
| Electrical Characteristics | ||||||
| BVDSS | Drain-Source Breakdown Voltage | VGS=0V , ID=-250uA | -20 | V | ||
| BVDSS/TJ | BVDSS Temperature Coefficient | Reference to 25 , ID=-1mA | -0.014 | V/ | ||
| RDS(ON) | Static Drain-Source On-Resistance2 | VGS=-4.5V , ID=-4.9A | 32 | 38 | m | |
| RDS(ON) | Static Drain-Source On-Resistance2 | VGS=-2.5V , ID=-3.4A | 45 | 55 | m | |
| RDS(ON) | Static Drain-Source On-Resistance2 | VGS=-1.8V , ID=-2A | 65 | 85 | m | |
| VGS(th) | Gate Threshold Voltage | VGS=VDS , ID =-250uA | -0.4 | -1.0 | V | |
| VGS(th)/TJ | VGS(th) Temperature Coefficient | 3.95 | mV/ | |||
| IDSS | Drain-Source Leakage Current | VDS=-16V , VGS=0V , TJ=25 | -1 | uA | ||
| IDSS | Drain-Source Leakage Current | VDS=-16V , VGS=0V , TJ=55 | -5 | uA | ||
| IGSS | Gate-Source Leakage Current | VGS=12V , VDS=0V | 100 | nA | ||
| gfs | Forward Transconductance | VDS=-5V , ID=-3A | 12.8 | S | ||
| Qg | Total Gate Charge | VDS=-15V , VGS=-4.5V , ID=-3A | 10.2 | 14.3 | nC | |
| Qgs | Gate-Source Charge | 1.89 | 2.6 | |||
| Qgd | Gate-Drain Charge | 3.1 | 4.3 | |||
| td(on) | Turn-On Delay Time | VDD=-10V , VGS=-4.5V , RG=3.3 , ID=-3A | 5.6 | 11.2 | ns | |
| tr | Rise Time | 40.8 | 73 | |||
| td(off) | Turn-Off Delay Time | 33.6 | 67 | |||
| tf | Fall Time | 18 | 36 | |||
| Ciss | Input Capacitance | VDS=-15V , VGS=0V , f=1MHz | 857 | 1200 | pF | |
| Coss | Output Capacitance | 114 | 160 | pF | ||
| Crss | Reverse Transfer Capacitance | 108 | 151 | pF | ||
| IS | Continuous Source Current1,4 | VG=VD=0V , Force Current | -4.9 | A | ||
| ISM | Pulsed Source Current2,4 | -14 | A | |||
| VSD | Diode Forward Voltage2 | VGS=0V , IS=-1A , TJ=25 | -1 | V | ||
| trr | Reverse Recovery Time | IF=-3A , di/dt=100A/s , TJ=25 | 21.8 | nS | ||
| Qrr | Reverse Recovery Charge | 6.9 | nC | |||
| Package Dimensions | ||||||
| Symbol | Dimensions in Millimeters | MIN. | MAX. | |||
| A | 0.900 | 1.150 | ||||
| A1 | 0.000 | 0.100 | ||||
| A2 | 0.900 | 1.050 | ||||
| b | 0.300 | 0.500 | ||||
| c | 0.080 | 0.150 | ||||
| D | 2.800 | 3.000 | ||||
| E | 1.200 | 1.400 | ||||
| E1 | 2.250 | 2.550 | ||||
| e | 0.950TYP | |||||
| e1 | 1.800 | 2.000 | ||||
| L | 0.550REF | |||||
| L1 | 0.300 | 0.500 | ||||
| 0 | 8 | |||||
Notes:
- 1. The data tested by surface mounted on a 1 inch2 FR-4 board with 2OZ copper.
- 2. The data tested by pulsed, pulse width 300s, duty cycle 2%.
- 3. The power dissipation is limited by 150 junction temperature.
- 4. The data is theoretically the same as ID and IDM, in real applications, should be limited by total power dissipation.
2409292333_Leiditech-LMTL5P02_C3647040.pdf
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