CET Chino Excel Tech CEA3252 N Channel Enhancement Mode Transistor Featuring High Density Cell Design
Key Attributes
Model Number:
CEA3252
Product Custom Attributes
Drain To Source Voltage:
30V
Current - Continuous Drain(Id):
5A
Operating Temperature -:
-
RDS(on):
45mΩ@4.5V,4A
Gate Threshold Voltage (Vgs(th)):
3V@250uA
Type:
N-Channel
Reverse Transfer Capacitance (Crss@Vds):
95pF
Number:
1 N-channel
Input Capacitance(Ciss):
610pF
Output Capacitance(Coss):
-
Pd - Power Dissipation:
1.25W
Gate Charge(Qg):
16nC@10V
Mfr. Part #:
CEA3252
Package:
SOT-89
Product Description
Product Overview
The CEA3252 is an N-Channel Enhancement Mode Field Effect Transistor designed for high-performance applications. It features a high-density cell design for extremely low RDS(ON) at both 10V and 4.5V gate-source voltages, ensuring efficient power handling. This transistor is rugged and reliable, housed in a SOT-89 package. It is suitable for applications requiring precise control and minimal power loss.
Product Attributes
- Brand: CETSEMI (implied by URL)
- Package: SOT-89
- Lead Free Product: Acquired
- Product Status: Preliminary (Details subject to change)
Technical Specifications
| Parameter | Symbol | Min | Typ | Max | Units | Test Condition |
|---|---|---|---|---|---|---|
| ABSOLUTE MAXIMUM RATINGS (TA = 25C unless otherwise noted) | ||||||
| Drain-Source Voltage | VDS | 30 | V | |||
| Gate-Source Voltage | VGS | 20 | V | |||
| Drain Current-Continuous | ID | 5 | A | |||
| Drain Current-Pulsed | IDM | 20 | A | |||
| Maximum Power Dissipation | PD | 1.25 | W | TA = 25C | ||
| Operating and Store Temperature Range | TJ,Tstg | -55 | 150 | C | ||
| Thermal Characteristics (TA = 25C unless otherwise noted) | ||||||
| Thermal Resistance, Junction-to-Ambient | RJA | 100 | C/W | b | ||
| Electrical Characteristics (TA = 25C unless otherwise noted) | ||||||
| Drain-Source Breakdown Voltage | BVDSS | 30 | V | VGS = 0V, ID = 250A | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | A | VDS = 30V, VGS = 0V | ||
| Gate Body Leakage Current, Forward | IGSSF | 100 | nA | VGS = 20V | ||
| Gate Body Leakage Current, Reverse | IGSGR | -100 | nA | VGS = -20V | ||
| Gate Threshold Voltage | VGS(th) | 1.0 | 3.0 | V | VGS = VDS, ID = 250A | |
| Static Drain-Source On-Resistance | RDS(on) | 32 | m | VGS = 10V, ID = 5A | ||
| Static Drain-Source On-Resistance | RDS(on) | 45 | m | VGS = 4.5V, ID = 4A | ||
| Input Capacitance | Ciss | 610 | pF | VDD = 15V, ID = 5A, VGS = 10V, RGEN = 3 | ||
| Reverse Transfer Capacitance | Crss | 95 | pF | VDS = 15V, ID = 5A, VGS = 10V | ||
| Output Capacitance | Coss | 145 | pF | VDS = 15V, VGS = 0V, f = 1.0 MHz | ||
| Turn-On Delay Time | td(on) | 9 | ns | |||
| Turn-On Rise Time | tr | 24 | ns | |||
| Turn-Off Delay Time | td(off) | 50 | ns | |||
| Turn-Off Fall Time | tf | 10 | ns | |||
| Total Gate Charge | Qg | 20 | nC | |||
| Gate-Source Charge | Qgs | 8 | nC | |||
| Gate-Drain Charge | Qgd | 5 | nC | |||
| Drain-Source Diode Forward Current | IS | 16 | A | b | ||
| Drain-Source Diode Forward Voltage | VSD | 1.2 | 2.5 | V | VGS = 0V, IS = 16A c | |
Notes:
a. Repetitive Rating: Pulse width limited by maximum junction temperature.
b. Surface Mounted on FR4 Board, t < 10 sec.
c. Pulse Test: Pulse Width < 300s, Duty Cycle < 2%.
d. Guaranteed by design, not subject to production testing.
2409301933_CET-Chino-Excel-Tech-CEA3252_C154278.pdf
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