Phase Control Thyristor VISHAY VS-ST1200C20K1P with Metal Case and Center Amplifying Gate Technology
Product Overview
The Vishay Semiconductors VS-ST1200C..K Series are high-performance Phase Control Thyristors featuring a center amplifying gate and a metal case with a ceramic insulator. Designed and qualified for industrial-level applications, these thyristors are ideal for DC motor controls, controlled DC power supplies, and AC controllers. They offer robust performance with a high profile hockey PUK design in the international standard K-PUK (A-24) package.
Product Attributes
- Brand: Vishay Semiconductors
- Case Style: K-PUK (A-24)
- Material Categorization: For definitions of compliance, please see www.vishay.com/doc?99912
Technical Specifications
| Parameter | Test Conditions | Values | Units | ||
|---|---|---|---|---|---|
| Primary Characteristics | |||||
| IT(AV) | 1650 | A | |||
| VDRM/VRRM | 1200, 1400, 1600, 1800, 2000 | V | |||
| VTM | 1.73 | V | |||
| IGT | 100 | mA | |||
| TJ | -40 to +125 | C | |||
| Package | K-PUK (A-24) | ||||
| Circuit configuration | Single SCR | ||||
| Major Ratings and Characteristics | |||||
| IT(AV) | Ths 55 C | 1650 | A | ||
| IT(RMS) | Ths 25 C | 3080 | A | ||
| ITSM | 50 Hz | 30 500 | A | ||
| 60 Hz | 32 000 | A | |||
| I2t | 50 Hz | 4651 | kAs | ||
| 60 Hz | 4250 | kAs | |||
| VDRM/VRRM | 1200 to 2000 | V | |||
| tq | Typical | 200 | s | ||
| TJ | -40 to +125 | C | |||
| Voltage Ratings | |||||
| TYPE NUMBER | VOLTAGE CODE | VDRM/VRRM, MAXIMUM REPETITIVE PEAK AND OFF-STATE VOLTAGE | VRSM, MAXIMUM NON-REPETITIVE PEAK VOLTAGE | IDRM/IRRM MAXIMUM AT TJ = TJ MAXIMUM | mA |
| VS-ST1200C..K | 12 | 1200 | 1300 | 100 | |
| VS-ST1200C..K | 14 | 1400 | 1500 | 150 | |
| VS-ST1200C..K | 16 | 1600 | 1700 | 160 | |
| VS-ST1200C..K | 18 | 1800 | 1900 | 180 | |
| VS-ST1200C..K | 20 | 2000 | 2100 | 200 | |
| Absolute Maximum Ratings | |||||
| Maximum average on-state current at heatsink temperature | 180 conduction, half sine wave double side (single side) cooled | 1650 (700) | A | ||
| 55 (85) | C | ||||
| Maximum RMS on-state current | DC at 25 C heatsink temperature double side cooled | 3080 | A | ||
| Maximum peak, one-cycle non-repetitive surge current | t = 10 ms No voltage reapplied Sinusoidal half wave, initial TJ = TJ maximum | 30 500 | A | ||
| t = 8.3 ms | 32 000 | A | |||
| t = 10 ms 100 % VRRM reapplied | 25 700 | A | |||
| t = 8.3 ms | 26 900 | A | |||
| Maximum I2t for fusing | t = 10 ms No voltage reapplied | 4651 | kAs | ||
| t = 8.3 ms | 4250 | kAs | |||
| t = 10 ms 100 % VRRM reapplied | 3300 | kAs | |||
| t = 8.3 ms | 3000 | kAs | |||
| Maximum I2t for fusing | t = 0.1 ms to 10 ms, no voltage reapplied | 46 510 | kAs | ||
| Low level value of threshold voltage | (16.7 % x x IT(AV) < I < x IT(AV)), TJ = TJ maximum | 0.91 | V | ||
| High level value of threshold voltage | (I > x IT(AV)), TJ = TJ maximum | 1.01 | V | ||
| Low level value of on-state slope resistance | (16.7 % x x IT(AV) < I < x IT(AV)), TJ = TJ maximum | 0.21 | m | ||
| High level value of on-state slope resistance | (I > x IT(AV)), TJ = TJ maximum | 0.19 | m | ||
| Maximum on-state voltage | Ipk = 4000 A, TJ = TJ maximum, tp = 10 ms sine pulse | 1.73 | V | ||
| Maximum holding current | TJ = 25 C, anode supply 12 V resistive load | 600 | mA | ||
| Typical latching current | 1000 | ||||
| Switching Parameter | |||||
| Maximum non-repetitive rate of rise of turned-on current | Gate drive 20 V, 20 , tr 1 s TJ = TJ maximum, anode voltage 80 % VDRM | 1000 | A/s | ||
| Typical delay time | Gate current 1 A, dIg/dt = 1 A/s Vd = 0.67 % VDRM, TJ = 25 C | 1.9 | s | ||
| Typical turn-off time | ITM = 550 A, TJ = TJ maximum, dI/dt = 40 A/s, VR = 50 V, dV/dt = 20 V/s, gate 0 , tp = 500 s | 200 | s | ||
| Blocking Parameter | |||||
| Maximum critical rate of rise of off-state voltage | TJ = TJ maximum linear to 80 % rated VDRM | 500 | V/s | ||
| Maximum peak reverse and off-state leakage current | TJ = TJ maximum, rated VDRM/VRRM applied | 100 | mA | ||
| Triggering Parameter | |||||
| Maximum peak gate power | TJ = TJ maximum, tp 5 ms | 16 | W | ||
| Maximum average gate power | TJ = TJ maximum, f = 50 Hz, d% = 50 | 3 | |||
| Maximum peak positive gate current | TJ = TJ maximum, tp 5 ms | 3.0 | A | ||
| Maximum peak positive gate voltage | 20 | V | |||
| Maximum peak negative gate voltage | 5.0 | V | |||
| DC gate current required to trigger | TJ = -40 C, 12 V anode to cathode applied | 200 | mA | ||
| TJ = 25 C | 100 to 200 | mA | |||
| TJ = 125 C | 50 | mA | |||
| DC gate voltage required to trigger | TJ = -40 C | 1.4 | V | ||
| TJ = 25 C | 1.1 to 3.0 | V | |||
| TJ = 125 C | 0.9 | V | |||
| DC gate current not to trigger | TJ = TJ maximum | 10 | mA | ||
| DC gate voltage not to trigger | 0.25 | V | |||
| Thermal and Mechanical Specifications | |||||
| Maximum operating junction temperature range | -40 to 125 | C | |||
| Maximum storage temperature range | -40 to 150 | C | |||
| Maximum thermal resistance, junction to heatsink | DC operation single side cooled | 0.042 | K/W | ||
| DC operation double side cooled | 0.021 | K/W | |||
| Maximum thermal resistance, case to heatsink | DC operation single side cooled | 0.006 | K/W | ||
| DC operation double side cooled | 0.003 | K/W | |||
| Mounting force, 10 % | 500 (2500) | N (kg) | |||
| Approximate weight | 425 | g | |||
| Case style | See dimensions - link at the end of datasheet | K-PUK (A-24) | |||
Dimensions: See www.vishay.com/doc?95081
Ordering Information:
Device code: VS-ST1200C20K
- 1 - Vishay Semiconductors product
- 2 - Essential part number
- 3 - 0 = converter grade
- 4 - C = ceramic PUK
- 5 - Voltage code: code x 100 = VRRM (see Voltage Ratings table)
- 6 - K = PUK case K-PUK (A-24)
- 7 - 0 = eyelet terminals (gate and auxiliary cathode unsoldered leads)
- 7 - 1 = fast-on terminals (gate and auxiliary cathode unsoldered leads)
- 8 - Critical dV/dt: None = 500 V/s (standard selection)
- 8 - L = 1000 V/s (special selection)
- 9 - 8 = voltage code for 1800V
2411272144_VISHAY-VS-ST1200C20K1P_C17687988.pdf
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