Embedded Controller Infineon SAK-TC364DP-64F300F AA 32-Bit Single-Chip Microcontroller Technology
Key Attributes
Model Number:
SAK-TC364DP-64F300F AA
Product Custom Attributes
Mfr. Part #:
SAK-TC364DP-64F300F AA
Package:
TQFP-144
Product Description
Infineon TC36x AA-Step 32-Bit Single-Chip Microcontroller
The TC36x AA-Step is a 32-bit single-chip microcontroller designed for open market applications. It offers advanced features and robust performance for a wide range of embedded systems.
Product Attributes
- Brand: Infineon Technologies AG
- Product Line: AURIX
- Edition: 2021-03
- Version: V 1.1
Technical Specifications
| Section | Description | Page |
|---|---|---|
| Summary of Features | Overview of key features | 7 |
| Pin Definition and Functions | Detailed pin configurations for various package variants | 11 |
| Electrical Specification | Comprehensive electrical characteristics and operating conditions | 368 |
| Absolute Maximum Ratings | Voltage, current, and temperature limits | 369 |
| Operating Conditions | Recommended operating ranges for voltage and temperature | 373 |
| 5 V / 3.3 V switchable Pads | Specifications for configurable I/O pads | 376 |
| High performance LVDS Pads | Characteristics of Low-Voltage Differential Signaling pads | 393 |
| VADC Parameters | Analog-to-Digital Converter specifications | 396 |
| DSADC Parameters | Digital-to-Analog Converter specifications | 400 |
| MHz Oscillator | Specifications for the main clock oscillator | 403 |
| Back-up Clock | Specifications for the auxiliary clock source | 405 |
| Temperature Sensor | On-chip temperature sensor characteristics | 406 |
| Power Supply Current | Current consumption details | 407 |
| Power Supply Infrastructure and Supply Start-up | Details on power supply management and start-up sequences | 411 |
| Reset Timing | Timing parameters for the reset signal | 420 |
| EVR | External Voltage Regulator specifications | 423 |
| System Phase Locked Loop (SYS_PLL) | Specifications for the system clock PLL | 432 |
| Peripheral Phase Locked Loop (PER_PLL) | Specifications for the peripheral clock PLL | 433 |
| AC Specifications | AC timing characteristics | 434 |
| JTAG Parameters | Joint Test Action Group interface specifications | 435 |
| DAP Parameters | Debug Access Port specifications | 437 |
| ASCLIN SPI Master Timing | Serial Peripheral Interface master mode timing | 439 |
| QSPI Timings, Master and Slave Mode | Quad SPI timings for master and slave operation | 441 |
| MSC Timing 5 V Operation | Multi-channel Serial Interface timing for 5V operation | 445 |
| Ethernet Interface (ETH) Characteristics | Specifications for the Ethernet controller | 447 |
2504101957_Infineon-SAK-TC364DP-64F300F-AA_C538860.pdf
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